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oai:kanazawa-u.repo.nii.ac.jp:00008043 2024-06-20T06:13:44Z 934:935:936

A single-chip 20-channel speech spectrum analyaer using a multiplexed switched-capacitor filter bank Kuranishi, Yoshiaki 00207945 Nakayama, Kenji Miyadera, Kazuyuki Okumura, Toshiyuki A single-chip speech spectrum analyzer which contains a 20-channel filter bank, a 9-bit-resolution analog-to-digital converter, and a 396-bit buffer memory is described. Several efficient design techniques were used to realize the equivalent 308th-order transfer functions on a single chip monolithic MOS circuit. A new time-division-multiplexed switched-capacitor filter technique is introduced which can easily cancel DC offsets which appear in the multiplexed channel outputs. The LSI was fabricated in 3.5-μm CMOS technology, with a 7.0×6.5 mm/SUP 2/ die size, a power consumption of 150 mW, with a single power supply of +5 V. Experimental results show that designed performance was realized. 金沢大学理工研究域　電子情報学系 IEEE = Institute of Electrical and Electronics Engineers 1984-12-01 2017-10-03 eng journal article VoR http://hdl.handle.net/2297/18282 https://kanazawa-u.repo.nii.ac.jp/records/8043 https://doi.org/10.1109/jssc.1984.1052252 AA00667434 0018-9200 IEEE journal of solid state circuits SC-19 6 964 970 https://kanazawa-u.repo.nii.ac.jp/record/8043/files/TE-PR-NAKAYAMA-K-964.pdf application/pdf 566.0 kB 2017-10-03