{"created":"2023-07-27T07:01:57.961917+00:00","id":62418,"links":{},"metadata":{"_buckets":{"deposit":"f010674a-b464-4e91-b82e-d8f2e0d117d5"},"_deposit":{"created_by":18,"id":"62418","owners":[18],"pid":{"revision_id":0,"type":"depid","value":"62418"},"status":"published"},"_oai":{"id":"oai:kanazawa-u.repo.nii.ac.jp:00062418","sets":["2812:2813:3907"]},"author_link":["10817"],"item_9_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2016-04-21","bibliographicIssueDateType":"Issued"},"bibliographicPageStart":"2p.","bibliographicVolumeNumber":"1981","bibliographic_titles":[{"bibliographic_title":"昭和56(1981)年度 科学研究費補助金 一般研究(C) 研究課題概要"},{"bibliographic_title":"1981 Research Project Summary","bibliographic_titleLang":"en"}]}]},"item_9_creator_33":{"attribute_name":"著者別表示","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Takebe, Tsuyoshi"}],"nameIdentifiers":[{"nameIdentifier":"10817","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"20019699","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=20019699"}]}]},"item_9_description_22":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"研究課題/領域番号:56550227, 研究期間(年度):1981","subitem_description_type":"Other"},{"subitem_description":"出典：「複素係数回路を用いるディジタル・アナログLSI化可変遅延等化器」研究成果報告書　課題番号56550227\n（KAKEN：科学研究費助成事業データベース（国立情報学研究所）） \n（https://kaken.nii.ac.jp/ja/grant/KAKENHI-PROJECT-56550227/）を加工して作成","subitem_description_type":"Other"}]},"item_9_description_5":{"attribute_name":"提供者所属","attribute_value_mlt":[{"subitem_description":"金沢大学工学部","subitem_description_type":"Other"}]},"item_9_identifier_registration":{"attribute_name":"ID登録","attribute_value_mlt":[{"subitem_identifier_reg_text":"10.24517/00068656","subitem_identifier_reg_type":"JaLC"}]},"item_9_relation_28":{"attribute_name":"関連URI","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"https://kaken.nii.ac.jp/ja/search/?kw=20019699"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"https://kaken.nii.ac.jp/ja/search/?kw=20019699","subitem_relation_type_select":"URI"}},{"subitem_relation_name":[{"subitem_relation_name_text":"https://kaken.nii.ac.jp/ja/grant/KAKENHI-PROJECT-56550227/"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"https://kaken.nii.ac.jp/ja/grant/KAKENHI-PROJECT-56550227/","subitem_relation_type_select":"URI"}}]},"item_9_version_type_25":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"武部, 幹"}],"nameIdentifiers":[{"nameIdentifier":"10817","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"20019699","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=20019699"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2023-04-17"}],"displaytype":"detail","filename":"TE-PR-TAKEBE-T-kaken 2016-2p.pdf","filesize":[{"value":"73.2 kB"}],"format":"application/pdf","licensetype":"license_11","mimetype":"application/pdf","url":{"label":"TE-PR-TAKEBE-T-kaken 2016-2p.pdf","url":"https://kanazawa-u.repo.nii.ac.jp/record/62418/files/TE-PR-TAKEBE-T-kaken 2016-2p.pdf"},"version_id":"294b0e8e-1de4-4f78-a885-f9e618b48207"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"research report","resourceuri":"http://purl.org/coar/resource_type/c_18ws"}]},"item_title":"複素係数回路を用いるディジタル・アナログLSI化可変遅延等化器","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"複素係数回路を用いるディジタル・アナログLSI化可変遅延等化器"}]},"item_type_id":"9","owner":"18","path":["3907"],"pubdate":{"attribute_name":"公開日","attribute_value":"2023-04-17"},"publish_date":"2023-04-17","publish_status":"0","recid":"62418","relation_version_is_last":true,"title":["複素係数回路を用いるディジタル・アナログLSI化可変遅延等化器"],"weko_creator_id":"18","weko_shared_id":-1},"updated":"2024-07-01T07:02:14.758646+00:00"}