@inproceedings{oai:kanazawa-u.repo.nii.ac.jp:00007432,
 author = {Nakayama, Kenji and Kuriki, Satoshi},
 book = {Proceedings - IEEE International Symposium on Circuits and Systems},
 month = {Jun},
 note = {A simplified digital tuned-circuit extractor is proposed. An A/D converter and multipliers are not required. An A/D converter and multipliers are not required. The tuning frequency is determined only by a master clock. The tank circuit output noise is sufficiently suppressed by newly introduced error canceller. Although sampling frequency for the tank circuit is relatively low, the phase of the output signal is effectively detected. A computer simulation shows that phase adjusting for data sampling clock is stable. The proposed timing extractor is easily realized on digital integrated circuits.},
 pages = {1483--1486},
 publisher = {IEEE(Institute of Electrical and Electronics Engineers)},
 title = {A multiplier-less digital timing extractor circuit with round-off error canceller},
 year = {1985}
}