{"created":"2023-07-27T06:24:39.356265+00:00","id":7651,"links":{},"metadata":{"_buckets":{"deposit":"3d053cf3-ff88-4133-8713-5f947c42b149"},"_deposit":{"created_by":3,"id":"7651","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"7651"},"status":"published"},"_oai":{"id":"oai:kanazawa-u.repo.nii.ac.jp:00007651","sets":["4163:4171:4187"]},"author_link":["10273","10276","10277","2109","305","10275","10272","10274"],"item_4_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2002-11-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"11","bibliographicPageEnd":"1862","bibliographicPageStart":"1856","bibliographicVolumeNumber":"49","bibliographic_titles":[{"bibliographic_title":"IEEE Transactions on Electron Devices"}]}]},"item_4_creator_33":{"attribute_name":"著者別表示","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"飯山, 宏一"}],"nameIdentifiers":[{},{}]}]},"item_4_description_21":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"A gate insulating layer with single nm-order thickness for suppressing gate leakage current is one of the key factors in extending downsizing limits, based upon the scaling rule, of field-effect-type transistors. We describe the fabrication and characterization of GaAs MISFETs with a nm-thin oxidized layer as the gate insulating layer, which is formed by an ultraviolet (UV) and ozone process. The UV and ozone process forms oxidized GaAs layers near the surface, which effectively suppress the reverse leakage current by several orders of magnitude. The fabricated GaAs MISFET can operate not only in the depletion mode, but also in the accumulation mode up to 3 V gate voltage for 8-nm-thick oxidized layers due to the current blocking effect of the oxidized layer. A current cutoff frequency of 6 GHz and a maximum oscillation frequency of 8 GHz are obtained for a GaAs MISFET with 1-/spl mu/m gate length and 8-nm-thick oxidized layers.","subitem_description_type":"Abstract"}]},"item_4_description_5":{"attribute_name":"提供者所属","attribute_value_mlt":[{"subitem_description":"金沢大学工学部","subitem_description_type":"Other"}]},"item_4_identifier_registration":{"attribute_name":"ID登録","attribute_value_mlt":[{"subitem_identifier_reg_text":"10.24517/00007638","subitem_identifier_reg_type":"JaLC"}]},"item_4_publisher_17":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_4_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isIdenticalTo","subitem_relation_type_id":{"subitem_relation_type_id_text":"https://doi.org/10.1109/ted.2002.804720","subitem_relation_type_select":"DOI"}}]},"item_4_rights_23":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"Copyright ©2002 IEEE.. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE..IEEE Transactions on Electron Devices,49(11),pp.1856-1862"}]},"item_4_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0018-9383","subitem_source_identifier_type":"ISSN"}]},"item_4_version_type_25":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Iiyama, Koichi"}],"nameIdentifiers":[{},{},{},{}]},{"creatorNames":[{"creatorName":"Kita, Yukihiro"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ohta, Yosuke"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Nasuno, Masaaki"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Takamiya, Saburo"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Higashimine, Koichi"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Ohtsuka, Nobuo"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2017-10-03"}],"displaytype":"detail","filename":"01097899.pdf","filesize":[{"value":"624.9 kB"}],"format":"application/pdf","licensetype":"license_11","mimetype":"application/pdf","url":{"label":"01097899.pdf","url":"https://kanazawa-u.repo.nii.ac.jp/record/7651/files/01097899.pdf"},"version_id":"e87863b0-43a3-4f58-a40c-8181e0557982"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Fabrication of GaAs MISFET with nm-thin oxidized layer formed by UV and ozone process","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Fabrication of GaAs MISFET with nm-thin oxidized layer formed by UV and ozone process"}]},"item_type_id":"4","owner":"3","path":["4187"],"pubdate":{"attribute_name":"公開日","attribute_value":"2017-10-03"},"publish_date":"2017-10-03","publish_status":"0","recid":"7651","relation_version_is_last":true,"title":["Fabrication of GaAs MISFET with nm-thin oxidized layer formed by UV and ozone process"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-07-27T10:33:44.339260+00:00"}