@inproceedings{oai:kanazawa-u.repo.nii.ac.jp:00007841,
 author = {深山, 正幸 and 松田, 吉雄 and Makino, Hiroshi and Kusumoto, Takahito and Nakata, Shunji and Mutoh, Shinichiro and Miyama, Masayuki and Yoshimura, Tsutomu and Iwade, Shuhei and Matsuda, Yoshio},
 book = {Proceedings of the 8th IEEE International NEWCAS Conference},
 issue = {5603927},
 month = {Jan},
 note = {The SRAM operating margin in 65nm technology is analyzed. The peak characteristic in the read margin versus the supply voltage was found to be caused by the channel length modulation effect. Controlling the memory cell virtual ground line proved to be effective in enlarging the operating margin simultaneously in the read and the write operations. A simple o ptimum circuit which does not require any dynamic voltage c ontrol is proposed, realizing an improvement in the operating m argin comparable to conventional circuits requiring dynamic voltage control. © 2010 IEEE., 金沢大学理工研究域電子情報学系},
 pages = {73--76},
 publisher = {IEEE = Institute of Electrical and Electronics Engineers},
 title = {Simultaneous enlargement of SRAM read/write noise margin by controlling virtual ground lines},
 volume = {NEWCAS2010},
 year = {2010}
}