{"created":"2023-07-27T06:25:59.757372+00:00","id":9526,"links":{},"metadata":{"_buckets":{"deposit":"dfdd7f6c-0a29-4bf5-98c3-3493201f852e"},"_deposit":{"created_by":3,"id":"9526","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"9526"},"status":"published"},"_oai":{"id":"oai:kanazawa-u.repo.nii.ac.jp:00009526","sets":["934:935:936"]},"author_link":["13761","13759","11069","13760","11068"],"item_4_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2005-10-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"10","bibliographicPageEnd":"3621","bibliographicPageStart":"3619","bibliographicVolumeNumber":"41","bibliographic_titles":[{"bibliographic_title":"IEEE Transactions on Maggetics"}]}]},"item_4_description_21":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"High-density double-layer printed circuit board (PCB) inspection based on the eddy-current testing (ECT) technique is proposed in this paper. The ECT probe, which consisted of a planar meander exciting coil and spin-valve giant magnetoresistance (SV-GMR) sensor array, is used for this propose. Defects on both the top- and bottom-layer of the high-density double-layer PCB are examined by the ECT technique with scanning over either the top or bottom layer. The characteristics of the proposed ECT probe for high-density double-layer PCB inspection are studied. The inspection results of the high-density double-layer PCB model verify that applying the ECT technique enables identification of the defects of both the top and bottom layer with one-side scanning.","subitem_description_type":"Abstract"}]},"item_4_publisher_17":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Institute of Electrical and Electronics Engineers IEEE"}]},"item_4_relation_12":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isIdenticalTo","subitem_relation_type_id":{"subitem_relation_type_id_text":"10.1109/TMAG.2005.855173","subitem_relation_type_select":"DOI"}}]},"item_4_rights_23":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"© 2005 IEEE."}]},"item_4_source_id_11":{"attribute_name":"NCID","attribute_value_mlt":[{"subitem_source_identifier":"AA00667933","subitem_source_identifier_type":"NCID"}]},"item_4_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0018-9464","subitem_source_identifier_type":"ISSN"}]},"item_4_version_type_25":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Chomsuwan, K."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Yamada, Sotoshi"}],"nameIdentifiers":[{},{},{}]},{"creatorNames":[{"creatorName":"Iwahara, Masayoshi"}],"nameIdentifiers":[{},{}]},{"creatorNames":[{"creatorName":"Wakiwaka, H."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Shoji, S."}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2017-10-03"}],"displaytype":"detail","filename":"TE-PR-YAMADA-S-249.pdf","filesize":[{"value":"859.7 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"TE-PR-YAMADA-S-249.pdf","url":"https://kanazawa-u.repo.nii.ac.jp/record/9526/files/TE-PR-YAMADA-S-249.pdf"},"version_id":"d529c8e8-d909-4d5c-aff8-cb5ce8d53f0c"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Application of Eddy-Current Testing Technique for High-Density Double-Layer Printed circuit Board Inspection","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Application of Eddy-Current Testing Technique for High-Density Double-Layer Printed circuit Board Inspection"}]},"item_type_id":"4","owner":"3","path":["936"],"pubdate":{"attribute_name":"公開日","attribute_value":"2017-10-03"},"publish_date":"2017-10-03","publish_status":"0","recid":"9526","relation_version_is_last":true,"title":["Application of Eddy-Current Testing Technique for High-Density Double-Layer Printed circuit Board Inspection"],"weko_creator_id":"3","weko_shared_id":-1},"updated":"2023-07-28T01:53:01.209882+00:00"}