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Circuit implementation, operation, and simulation of multivalued nonvolatile static random access memory using a resistivity change device
http://hdl.handle.net/2297/36931
http://hdl.handle.net/2297/369317b86f8bb-7676-48b8-a4a4-9628a0bd2caf
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
ME-PR-NAKAYAMA-K-839198.pdf (2.0 MB)
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| Item type | 学術雑誌論文 / Journal Article(1) | |||||
|---|---|---|---|---|---|---|
| 公開日 | 2017-10-03 | |||||
| タイトル | ||||||
| タイトル | Circuit implementation, operation, and simulation of multivalued nonvolatile static random access memory using a resistivity change device | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| 著者 |
Nakayama, Kazuya
× Nakayama, Kazuya× Kitagawa, Akio |
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| 書誌情報 |
Active and Passive Electronic Components 号 2013, p. 839198, 発行日 2013-01-01 |
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| ISSN | ||||||
| 収録物識別子タイプ | ISSN | |||||
| 収録物識別子 | 0882-7516 | |||||
| NCID | ||||||
| 収録物識別子タイプ | NCID | |||||
| 収録物識別子 | AA10648924 | |||||
| DOI | ||||||
| 関連タイプ | isIdenticalTo | |||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | 10.1155/2013/839198 | |||||
| 出版者 | ||||||
| 出版者 | Hindawi Publishing Corporation | |||||
| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | We proposed and computationally analyzed a multivalued, nonvolatile SRAM using a ReRAM. Two reference resistors and a programmable resistor are connected to the storage nodes of a standard SRAM cell. The proposed 9T3R MNV-SRAM cell can store 2 bits of memory. In the storing operation, the recall operation and the successive decision operation of whether or not write pulse is required can be performed simultaneously. Therefore, the duration of the decision operation and the circuit are not required when using the proposed scheme. In order to realize a stable recall operation, a certain current (or voltage) is applied to the cell before the power supply is turned on. To investigate the process variation tolerance and the accuracy of programmed resistance, we simulated the effect of variations in the width of the transistor of the proposed MNV-SRAM cell, the resistance of the programmable resistor, and the power supply voltage with 180 nm 3.3 V CMOS HSPICE device models. © 2013 Kazuya Nakayama and Akio Kitagawa.© 2013 K. Nakayama and A. Kitagawa. | |||||
| 権利 | ||||||
| 権利情報 | Copyright © 2013 K. Nakayama and A. Kitagawa. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. | |||||
| 著者版フラグ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
