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A single-chip SC line equalizer system for full duplex multi-bit rate digital transmission
http://hdl.handle.net/2297/6827
http://hdl.handle.net/2297/68271997268c-4f94-4df4-b24f-9883d250070a
名前 / ファイル | ライセンス | アクション |
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TE-PR-NAKAYAMA-K-1521.pdf (705.0 kB)
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Item type | 会議発表論文 / Conference Paper(1) | |||||
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公開日 | 2017-10-03 | |||||
タイトル | ||||||
タイトル | A single-chip SC line equalizer system for full duplex multi-bit rate digital transmission | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
資源タイプ | conference paper | |||||
著者 |
Nakayama, Kenji
× Nakayama, Kenji× Takahashi, Yutaka× Satoh, Yayoi× Naka, Masahiro× Nukada, Yasuaki |
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書誌情報 |
ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings 巻 1986, p. 1521-1524, 発行日 1986-04-01 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 0736-7791 | |||||
出版者 | ||||||
出版者 | IEEE(Institute of Electrical and Electronics Engineers) | |||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | The authors present a single-chip switched capacitor (SC) line equalizer system which can be applied to full duplex digital transmission. Adaptive SC filters, constructed with programmable capacitor arrays (PCAs), usually cause undesired responses, such as spike noise and transient response, which degrade data transmission quality. To avoid these phenomena, a duplex SC equalizer which has the same circuits in parallel is introduced. The PCAs in one duplex equalizer, whose output is not transferred, are varied. After the undesired phenomena vanish, the output is alternated. The equalizer system can be applied at several different bit rates by changing the external control signals. Algorithms and circuit realizations for a bridged tap echo canceller and a dc offset canceller are further improved. | |||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 |