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Efficient Implementation of RLS-Based Adaptive Filterson nVIDIA GeForce Graphics Processing Unit
http://hdl.handle.net/2297/35267
http://hdl.handle.net/2297/35267bded9250-fdf1-4dbe-ae6d-a5502f94ff28
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
TE-PR-HIRANO-A-241.pdf (104.2 kB)
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| Item type | 学術雑誌論文 / Journal Article(1) | |||||
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| 公開日 | 2017-10-03 | |||||
| タイトル | ||||||
| タイトル | Efficient Implementation of RLS-Based Adaptive Filterson nVIDIA GeForce Graphics Processing Unit | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| 著者 |
Hirano, Akihiro
× Hirano, Akihiro× Nakayama, Kenji |
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| 書誌情報 |
第27回信号処理シンポジウム講演論文集 = Proc. of 27th SIP Symposium p. 241-245, 発行日 2012-01-01 |
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| 出版者 | ||||||
| 出版者 | 電子情報通信学会 = The Institute of Electronics, Information and Communication Engineers | |||||
| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | This paper presents efficient implementa- tion of RLS-based adaptive filters with a large number of taps on nVIDIA GeForce graphics processing unit (GPU) and CUDA software development environment. Modification of the order and the combination of calcu- lations reduces the number of accesses to slow off-chip memory. Assigning tasks into multiple threads also takes memory access order into account. Multiple shader pro- cessor arrays are used to handle a large matrix. For a 8192-tap case, a GPU program is almost 30-times faster than a CPU program. Real-time processing is possible for an 8kHz-sampling and 512-tap case by us- ing 32 shader processors, which is only 25% of GeForce 8800GTS. | |||||
| 権利 | ||||||
| 権利情報 | (c) 2012 電子情報通信学会 | |||||
| 著者版フラグ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
| 関連URI | ||||||
| 識別子タイプ | URI | |||||
| 関連識別子 | http://www.ieice.org/jpn/index.html | |||||
