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A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals
http://hdl.handle.net/2297/46741
http://hdl.handle.net/2297/467418bf92ea7-f468-4666-a4d9-8ebb5da83f1f
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
TE-PR-MATSUDA-Y-917-final.pdf (955.7 kB)
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| Item type | 学術雑誌論文 / Journal Article(1) | |||||
|---|---|---|---|---|---|---|
| 公開日 | 2017-10-03 | |||||
| タイトル | ||||||
| タイトル | A Field Programmable Sequencer and Memory with Middle Grained Programmability Optimized for MCU Peripherals | |||||
| 言語 | ||||||
| 言語 | eng | |||||
| 資源タイプ | ||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
| 資源タイプ | journal article | |||||
| 著者 |
Kawamura, Yoshifumi
× Kawamura, Yoshifumi× Okada, Naoya× Matsuda, Yoshio× Matsumura, Tetsuya× Makino, Hiroshi× Arimoto, Kazutami |
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| 書誌情報 |
IEICE transactions on fundamentals of electronics, communications and computer sciences 巻 E99.A, 号 5, p. 917-928, 発行日 2016-05-01 |
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| ISSN | ||||||
| 収録物識別子タイプ | ISSN | |||||
| 収録物識別子 | 0916-8508 | |||||
| NCID | ||||||
| 収録物識別子タイプ | NCID | |||||
| 収録物識別子 | AA10826239 | |||||
| DOI | ||||||
| 関連タイプ | isIdenticalTo | |||||
| 識別子タイプ | DOI | |||||
| 関連識別子 | 10.1587/transfun.E99.A.917 | |||||
| 出版者 | ||||||
| 出版者 | IEICE 電子情報通信学会 | |||||
| 抄録 | ||||||
| 内容記述タイプ | Abstract | |||||
| 内容記述 | A Field Programmable Sequencer and Memory (FPSM), which is a programmable unit exclusively optimized for peripherals on a micro controller unit, is proposed. The FPSM functions as not only the peripherals but also the standard built-in memory. The FPSM provides easier programmability with a smaller area overhead, especially when compared with the FPGA. The FPSM is implemented on the FPGA and the programmability and performance for basic peripherals such as the 8 bit counter and 8 bit accuracy Pulse Width Modulation are emulated on the FPGA. Furthermore, the FPSM core with a 4K bit SRAM is fabricated in 0.18µm 5 metal CMOS process technology. The FPSM is an half the area of FPGA, its power consumption is less than one-fifth. | |||||
| 内容記述 | ||||||
| 内容記述タイプ | Other | |||||
| 内容記述 | Embargo Period 6 months | |||||
| 権利 | ||||||
| 権利情報 | Copyright © 2016 The Institute of Electronics, Information and Communication Engineers | |||||
| 著者版フラグ | ||||||
| 出版タイプ | VoR | |||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
| 関連URI | ||||||
| 識別子タイプ | URI | |||||
| 関連識別子 | https://www.jstage.jst.go.jp/browse/transfun | |||||
| 関連URI | ||||||
| 識別子タイプ | URI | |||||
| 関連識別子 | http://www.ieice.org/jpn/ | |||||
